--- a/tools/firmware/hvmloader/pci.c	2012-06-18 01:02:20.000000000 +0200
+++ b/tools/firmware/hvmloader/pci.c	2012-06-18 01:26:41.000000000 +0200
@@ -34,6 +34,10 @@ unsigned long pci_mem_end = PCI_MEM_END;
 enum virtual_vga virtual_vga = VGA_none;
 unsigned long igd_opregion_pgbase = 0;
 
+/* virtual BDF of pass-throughed gfx declared in hvmloader.c*/
+extern uint8_t gfx_bdf;
+
+
 void pci_setup(void)
 {
     uint32_t base, devfn, bar_reg, bar_data, bar_sz, cmd, mmio_total = 0;
@@ -94,19 +98,43 @@ void pci_setup(void)
             }
             else if ( virtual_vga == VGA_none )
             {
-                vga_devfn = devfn;
-                virtual_vga = VGA_pt;
-                if ( vendor_id == 0x8086 )
-                {
-                    igd_opregion_pgbase = mem_hole_alloc(2);
-                    /*
-                     * Write the the OpRegion offset to give the opregion
-                     * address to the device model. The device model will trap 
-                     * and map the OpRegion at the give address.
-                     */
-                    pci_writel(vga_devfn, PCI_INTEL_OPREGION,
-                               igd_opregion_pgbase << PAGE_SHIFT);
+                 virtual_vga = VGA_pt;
+                 gfx_bdf = devfn;
+ 
+                 /* Make vBAR=pBAR */
+                 printf("Make vBAR = pBAR of assigned gfx\n");
+                 for ( bar = 0; bar < 7; bar++ )
+                 {
+                     bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
+                     if ( bar == 6 )
+                             bar_reg = PCI_ROM_ADDRESS;
+                     /* When first time read, it will return physical address */
+                     bar_data = pci_readl(devfn, bar_reg);
+                     pci_writel(devfn, bar_reg, bar_data);
+ 
+                     /* Now enable the memory or I/O mapping. */
+                     cmd = pci_readw(devfn, PCI_COMMAND);
+                     if ( (bar_reg == PCI_ROM_ADDRESS) ||
+                              ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
+                               PCI_BASE_ADDRESS_SPACE_MEMORY) )
+                           cmd |= PCI_COMMAND_MEMORY;
+                     else
+                           cmd |= PCI_COMMAND_IO;
+                     cmd |= PCI_COMMAND_MASTER;
+                     pci_writew(devfn, PCI_COMMAND, cmd);
                 }
+ 
+                 /* Map the interrupt. */
+                 pin = pci_readb(devfn, PCI_INTERRUPT_PIN);
+                 if ( pin != 0 )
+                 {
+                     /* This is the barber's pole mapping used by Xen. */
+                     link = ((pin - 1) + (devfn >> 3)) & 3;
+                     isa_irq = pci_readb(PCI_ISA_DEVFN, 0x60 + link);
+                     pci_writeb(devfn, PCI_INTERRUPT_LINE, isa_irq);
+                 }
+                 continue;
+
             }
             break;
         case 0x0680: